Hardware debugger for the fastest (IP) 8051 & 80251

July 02, 2015 // By Graham Prophet
Polish IP core provider and SoC design house Digital Core Design recently announced IP (intellectual property) 8051-architecture cores that it says are the fastest available; now, the company has added a matching non-intrusive hardware debugger for its DQ8051 and DQ80251.

The system is called DoCD (DCD’s on-Chip Debugger) and consists of the Debug IP Core, Hardware Assisted Debugger and Debug Software. It features instruction smart trace buffer (configurable up to 8192 levels), hardware debugging, software simulation and verification. DoCD provides some features such as a real-time and non-intrusive debug capability, enabling a pre-silicon validation and post-silicon, on-chip software debugging. It allows hardware breakpoints, trace, variables watch and multi C sources debugging. “DoCD Debug software can work as a hardware debugger, as well as a software simulato,” explains Tomasz Krzyzak, vice-president at Digital Core Design, “some tasks can be validated at software simulation level and after this step, it can continue real-time debugging by uploading code into silicon.”

The DoCD user can use their favourite C compilers or assemblers for software development - it supports most of High Level Object files produced by C/ASM compiler tools:

Extended OMF-51 produced by Keil compiler

IAR EWB 8051 & 80390 workbench

OMF-51 produced by Tasking compiler

Standard OMF-51 produced by some 8051 compilers

Extended OMF-251 produced by Keil compiler

NOI format file produced by SDCC-51 compiler

Intel HEX-51 format produced by each 8051 compiler

Intel HEX-386 format produced by each 80390 & 80251 compiler

BIN format produced by each 8051 & 80390 & 80251 compiler

System-on-Chip designs are facing, says DCD, a problem of inaccessibility of important control and bus signals, because they often lie behind the physical pins of the device - that makes traditional measurement instrumentation useless.

TheDoCD Hardware Debugger provides debugging capability for a whole System-on-Chip (SoC); non-intrusive debugging of a running application. It can also efficiently save designer’s time, thanks to hardware trace, called Instructions Smart Trace buffer (IST). The DoCD-IST captures instructions in a smart and non-intrusive way, so it doesn’t capture addresses of all executed instructions, but only these related to the start of tracing, conditional jumps and interrupts. This method not only saves time, but also benefits