Renesas R-Home S1 SoC offers performance improvements compared with Renesas' existing STB products by first taking advantage of the broadcast and security technologies developed in earlier TV/STB products, the recording technologies developed in Blu-RayTM/DVD products, and the low-power technologies developed for mobile product. R-Home S1 is the first Renesas STB SoC that takes advantage of the integrated SoC platform (a design platform that unifies critical core technologies from three areas: mobile products; automotive systems; and home multimedia) that Renesas developed after its merger in April 2010 which adopted the ARM multicore processors, and Imagination Technologies 3D graphics engine. It also includes a high-definition video transcoder to support smart phones and tablets.
The R-Home S1 SoC claims to offer the industry's highest level of CPU and 3D graphics processing performance in a STB product. By adopting the dual-core ARM Cortex-A9 MPCore, the R-Home S1 achieves an industry-leading performance of 5000 Dhrystone MIPS (DMIPS) at 1 GHz. This corresponds to a performance increase of approximately eight times compared to Renesas existing devices and can support a wide range of computation intensive applications including future multimedia formats by the use of the ARM NEON engine.
The new device incorporates the Imagination Technologies Ltd PowerVR SGX531 3D graphics core, which can implement photo-realistic 3D graphics display and intuitive 3D GUIs.
The R-Home S1 also incorporates a high-definition MPEG encoder supporting up to 1280 × 720 pixels at 30 fps and can convert input signals in real-time to any one of the MPEG2, MPEG4 or H.263 formats. This allows broadcast or Internet content received in an R-Home S1 based STB to be streamed to mobile terminals and even use STBs for video phone applications.
By adopting a 40-nm process, ARM Cortex-A9 dual core processor and optimized number of pins for a hybrid STB device, the R-Home S1 SoC has achieved an industry-leading small package size of 27 × 27 mm resulting in reduction of both