The device covers the frequency range from 60 MHz to 800 MHz and can be adjusted by the user with up to ±100 ppm, over a tuning range of 0 V to 3.3 V. Stability is ±50 ppm over the entire operating temperature range of -40 to +85°C.
The VC40 uses High Frequency Fundamental (HFF) technology to generate frequencies up to 230 MHz with low phase noise. For higher frequencies, a Phase Locked Loop (PLL) is avoided, and analog technology is used instead to provide outstanding phase noise and jitter performance.
The VC40 provides a four-pad LVCMOS (Low Voltage CMOS) output or a six-pad dual complementary output which can be configured to operate at LVDS (Low Voltage Differential Signaling) or LVPECL (Low Voltage PECL) levels.
The device operates from a 3.3 V supply voltage, and is provided in a compact 14 mm x 9 mm SMD package.
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