The PDK is made available to imec’s partners, and will be followed by incremental updates. Imec and its partners are developing a 14nm test chip to be released in the 2nd half of 2012 using this PDK.
With this PDK release, imec leads the way to an industry-standard 14nm PDK. In addition, the PDK anticipates the introduction of a number of new technologies at the 14nm node. The main example is the use of FinFET transistors, which have a larger drive per unit footprint and higher performance at low supply voltages compared to the traditional planar technologies. Evolutions of this PDK will gradually also introduce the use of high-mobility channel materials. The PDK includes elements of both immersion- and EUV lithography, opening the way for a gradual transition from 193nm immersion to EUV lithography.
This first 14nm PDK contains all elements for design assessment of the 14nm node through device compact models, parasitic extraction, design rules, parameterized cells (pcells), and basic logic cells. Starting from the PDK, imec and its partners are now designing a first test chip. This chip, planned for the 2nd half of 2012, will allow testing the device-, interconnect-, process- and litho assumptions, as well as performance and power of circuits implemented at the tight area budgets of the 14nm node.
The 14nm PDK was developed in the frame of imec’s INSITE program, and together with all the partners involved in this collaborative affiliation program. Through the INSITE program, imec offers its partners a very early insight in technologies. This way, companies can anticipate upcoming developments and start designing the more advanced systems and applications today, and get them on the market faster.
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