The products integrate NAND chips fabricated with 15 nm process technology and are designed for industrial applications, including PLCs (programmable logic controllers), CoMs (computer-on-module) and factory automation equipment, and can also be used in a wide range of consumer applications. The line-up offers densities of 8, 16, 32 and 64 GB.
The memories integrate NAND chips with a controller to manage basic control functions for NAND applications in a single package. As a complement to Toshiba’s current industrial product group of e∙MMC, which have an operating temperature range of -40 to +85°C, this e∙MMC product family support applications at higher temperatures up to +105°C.
The JEDEC e∙MMC Version 5.1 compliant interface handles essential functions, including writing block management, error correction and driver software. It simplifies system development, allowing manufacturers to minimize development costs and speed up time to market for new and upgraded products. New features standardized in JEDEC e∙MMC Version 5.1, such as BKOPS control, Cache Barrier, Cache Flushing Report, Large RPMB Write and Command Queuing, are applied. “BKOPS control” is a function where the host allows the device to perform background operation when the device is idle. “Cache Barrier” is a function that controls when cache data is written to the memory chip. “Cache Flushing Report” is a function that informs the host if the device’s flushing policy is FIFO (First In First Out) or not. “Large RPMB write” is a function that increases the data size that can be written to the RPMB area to 8KB. The “Command Queuing” feature allows users to process multiple tasks generated by the user’s issue of multiple commands, in the order of the user’s preference, by initially storing the tasks in a waiting queue. It improves random read performance speed by approximately 30% at maximum according to Toshiba survey.