Designed for high-density data center applications, the BCM84328 PHY delivers comprehensive PHY functionality while simplifying board design for server and network equipment manufacturers. Next generation networks demand higher density and bandwidth for data transmission and the BCM84328 delivers robust features and lowers system costs by integrating optical module control functionality that typically reside in field programmable gate arrays (FPGAs). The Octal 10GbE/Dual 40GbE BCM84328 PHY optimizes high-speed performance at the lowest power consumption in the industry – 300mW per full duplex10GbE port.
Data center 10GbE ports are projected to grow at a CAGR of 40 percent from 2012 - 2016, while 40GbE ports are projected to grow at a CAGR of 130 percent in the same time frame, and the the industry is moving to higher density switch and server configurations with requirements for lower power and lower latency of front panel Ethernet ports. This requires th elower power, especially for top of rack for 10GbE SFP+, 40GbE QSFP+ and backplane applications.
The BCM84328 also includes PHY features such as line and system high-speed equalization to drive SFP+, QSFP+, or KR interfaces, PRBS pattern generators and checkers, loopback functionality, and on-chip AC coupling capacitors to satisfy requirements for higher density switch and server configurations.
It integrates IEEE CL85 auto transmitter tuning on chip for optimal performance over 10GBASE-CR4 copper cables and has improved adaptive equalizer technology to drive copper KR/KR4 backplanes and CR/CR4 cables on both line and system interfaces.
The BCM84328 device is now sampling with production volume scheduled for second half of 2012.