Intel samples Stratix 10 FPGAs on 14nm node

October 10, 2016 // By Julien Happich
Intel announced it is now sampling the Stratix 10 FPGAs, moving the FPGA fabric to its 14nm tri-gate process technology and combining it with a new architecture called HyperFlex.

The Intel-branded Stratix 10 (after the acquisition of Altera) was first showcased by Intel CEO Brian Krzanich at the Intel Developers Forum 2016 in San Francisco, last summer and with it the company claims it delivered the most significant FPGA innovations in over a decade.

The new part sampling now boasts 2X the core performance and over 5X the density compared to the previous generation and up to 70 percent lower power than Stratix V FPGAs for equivalent performance.

The part delivers up to 10 TFLOPS of single-precision floating point DSP performance and up to 1TBps memory bandwidth with integrated High-Bandwidth Memory (HBM2) in-package. It embeds a quad-core 64-bit ARM Cortex-A53 processor. When used as a high-performance, multifunction accelerator in the data center, Stratix 10 FPGAs are capable of performing both the acceleration and high-performance networking capabilities, says the company, while allowing hardware reconfiguration in milliseconds to accelerate individual tasks.

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