Originally developed by the BBC Research as Dirac Pro and later standardised as SMPTE 2042, the VC-2 LD codec is patent-free which will facilitate market adoption and interoperability. The SMPTE ST-2047 standard already defines the carriage of high resolution video (up to 1080p60) over HD-SDI using VC-2 LD as a mezzanine compression algorithm. The RTP mapping of the codec is also currently being standardised as an IETF RFC in order to maximise interoperability of the transport over IP networks.
VC-2 Low Delay can enable cost saving associated to the transport of high resolution and high frame rate video content. For example, a 1080p60 stream can be transported over a single 1 Gbps Ethernet cable, and up to three 4K/UHD stream at 60 fps can be transported over 10 Gbps cable.
“A key distinguishing feature of VC-2 is that it is an open technology designed to avoid patent infringements. So it can be easily included in video production equipment as a hardware or software solution, without the potential costs, uncertainties, and practical difficulties of including other proprietary codecs” says Jean-Marie Cloquet, product manager of the video division at Barco Silex.
The low complexity of the algorithm allows cost-effective compression of the video stream. A typical use case of the VC-2 LD codec is the reduction of the bandwidth required to transport HD, 4K and high frame rate video signals. The VC-2 Low Delay compression algorithm is a simple wavelet-based intra-frame codec. The algorithm is described in the SMPTE 2042 standard, “VC-2 Video Compression”.
The algorithm is especially designed to achieve low latency. Due to its low complexity, the VC-2 LD encoder and decoder do not require any external memory. The resource usage being very low, it can be easily integrated in existing designs and low-end Altera and Xilinx FPGAs.
The VC-2 LD compression codec is very flexible. The resolution, chroma subsampling and compressed bitrate are all configurable according to the target