IP for an FPGA wideband digital down converter runs at 3.6 Gsamples/sec

October 06, 2014 // By Graham Prophet
RF Engines (RFEL) has added to its FPGA based signal processing devices with a flexible wideband digital down-converter (wideband DDC) IP core that is designed to accept wideband digitised data at sample rates of up to 3.6 Gsamples/sec, supporting first or second Nyquist bandwidths of up to 1.8 GHz.

Signals with bandwidths as high as 180 MHz can be down-converted to complex baseband (I/Q) from anywhere within the chosen input Nyquist band, within the limits imposed by the signal bandwidth. The down-conversion frequency is tuneable over the entire 1.8 GHz range, with an accuracy of better than 1 Hz, enabling, for example, the total removal of intermediate frequency (IF) components. The extracted signal bandwidth is precisely selectable in the range 800 Hz to 180 MHz. This is provided through user control of the output sample rate, which may be programmed in the range 1ksample/sec to 225 Msample/sec with an accuracy of better than 1 sample/sec.

High performance filtering provides a spurious free dynamic range (SFDR) of at least 80 dB, with a passband peak-to-peak ripple of less than 0.1 dB. User control of the down-conversion frequency and output sample rate, makes the core suitable for Software Defined Radio (SDR), electronic warfare (EW), signal surveillance and generic digital receiver applications. The wideband DDC joins RFEL's range of "channeliser" designs that provide flexible down-conversion for single and multiple channel applications.

The company says that, “the ability to down-convert a signal, from a bandwidth as high as 1.8 GHz, suits the wideband DDC for communications, electronic warfare and surveillance applications. RFEL uses the latest Xilinx and Altera FPGA technology, so that solutions can be made compact, lightweight and low power. A flexible architecture makes the product easily configurable to the customer's specific needs.”

RFEL; www.rfel.com