IP processor doubles performance for embedded Linux applications

October 15, 2014 // By Graham Prophet
Synopsys’ 32-bit ARC HS38 processor core is based on the extensible ARCv2 architecture and is optimised for growing number of embedded applications running Linux. It delivers more than 4200 DMIPS in typical 28 nm processes while consuming less than 90 mW of power and using 0.21 mm² of silicon area.

The core is optimised for high end networking, automotive and digital home applications running embedded Linux. It comes in single, dual and quad core configurations with support for Level 1 cache coherency, Level 2 cache and symmetric multiprocessing (SMP) for scalable performance. Synopsys has an ecosystem of software development tools, hardware, middleware and operating systems, including an optimised Linux kernel, to accelerate design of HS38 based systems.

The ARC HS38 processor is an addition to the ARC HS family of high speed processor IP cores. Like the previously released HS34 and HS36 processors, the 32 bit ARC HS38 is optimised for power efficiency (DMIPS/mW) and area efficiency (DMIPS/mm²) with additional features to support embedded Linux and other high end operating systems. A single HS38 processor delivers up to 4200 DMIPS at speeds up to 2.2 GHz in typical 28 nanometer (nm) silicon, more than twice the performance of previous generation ARC 770D cores supporting Linux. The ARC HS38's performance and low power consumption make it ideally suited to address the growing embedded control and signal processing demands of devices such as home routers and gateways, data centers, digital TVs, networked appliances and automotive infotainment.

The ARC HS Processor Family uses the ARCv2 instruction set architecture (ISA), which enables the implementation of high performance embedded designs with low power consumption and a small silicon footprint. The new HS38 processor has been optimised for embedded applications running Linux and offers excellent performance efficiency, delivering up to 1.93 DMIPS/MHz. The HS38 has a full featured memory management unit (MMU) supporting a 40 bit physical address space and page sizes up to 16 MBs, giving designers the ability to directly address a terabyte of memory with faster data access and higher system performance. The HS38 is also available in multicore configurations (dual core and quad core) with support for SMP Linux, full Level 1 (L1) cache coherency and up to 8 MB of Level