Low-jitter synchroniser clock IC for sync. Ethernet & IEEE1588

August 12, 2015 // By Graham Prophet
Silicon Labs positions its Si5348 clock IC as “enabling pervasive adoption of SyncE and IEEE 1588 network synchronization in Internet infrastructure”

In the company’s timing solutions for Internet infrastructure applications offering, and claimed as the highest-performance, most cost-effective packet network synchroniser clock, the Si5348 combines jitter performance with smallest footprint and lowest power in a highly integrated, standards-compliant solution. The Si5348 clock enables hardware designers to implement a “clock-tree-on-a-chip” solution for Synchronous Ethernet (SyncE), IEEE 1588v2 and general-purpose frequency translation for wireless and telecom infrastructure, broadband networks (e.g., G.fast DSL and PON) and data centre applications.

SyncE and IEEE 1588 are increasingly popular methods to deliver synchronisation over packet networks, requiringflexible, cost-effective timing solutions that integrate into existing hardware architectures. Conventional network synchroniser clocks rely on rigid synchronisation clock chip architectures that borrow heavily from legacy Stratum 3 clock ICs, which are not optimised for size, power or performance, Silabs asserts.

The Si5348 clock delivers a solution that is 50% smaller, 35% lower power and 80% lower jitter than conventional synchronisers. These benefits enable, says Silabs, hardware designers to simplify the adoption of packet network synchronisation without compromising system-level performance. The Si5348 architecture uses Silicon Labs’ fourth-generation DSPLL technology ( www.silabs.com/DSPLL) to deliver jitter performance in a timing solution that is fully compliant with IEEE 1588, SyncE and Stratum 3 clocking requirements, enabling the device to be used in a wide variety of timing card and line card clock architectures. The Si5348 clock has been designed to easily interoperate with IEEE 1588 software running on an external host processor, further simplifying system integration.

In packet timing applications, high-stability oscillators play a critical role in defining the network’s overall performance in terms of frequency, time and phase accuracy. Network topologies often will dictate the type of temperature-controlled crystal oscillator (TCXO) or oven-controlled crystal oscillator (OCXO) required at each node in the network. The Si5348 clock supports a universal reference input port, enabling the device to be paired with any frequency TCXO/OCXO.

As part of the Si5348 product development, Silicon Labs has