Low on-resistance p-channel MOSFET boosts efficiency in mobile computing devices

January 08, 2014 // By Paul Buckley
Vishay Intertechnology has extended its TrenchFET p-channel Gen III power MOSFETs with a device that claims the lowest on-resistance ever for a p-channel MOSFET.

Designed to increase efficiency in mobile computing devices, the -20 V Vishay Siliconix Si7157DP offers on-resistance of 0.0016Ω and 0.0020Ω  (1.6 or 2 mΩ) at -10V and -4.5V ratings, respectively.

The Si7157DP is optimised for load and battery switches in power management applications for notebook computers. The industry-low on-resistance of the Si7157DP allows designers to achieve lower voltage drops and conduction losses in their circuits, enabling more efficient use of power and longer battery run times - especially in peak load conditions - while its  6.15 x 5.15 mm PowerPAK SO-8 package footprint area saves valuable PCB space. The device's lower voltage drop at peak currents also provides a larger voltage margin over the UVLO (undervoltage lockout) level, helping prevent undesired undervoltage lockout conditions with the load.

The Si7157DP is 100% Rg- and UIS-tested. The MOSFET is halogen-free according to the JEDEC JS709A definition and compliant to RoHS Directive 2011/65/EU. Like other Vishay Siliconix p-channel Gen III MOSFETs, the Si7157DP is built on a process technology that packs one billion transistor cells into one square inch of silicon.
Vishay; www.vishay.com/mosfets/geniii-p