Mentor continues high-end PCB EDA revamp with system assembly tool

June 10, 2014 // By Graham Prophet
Mentor Graphics has introduced Xpedition Path Finder Suite, a package for efficient optimisation, assembly, and visualisation of system designs from IC package to PCB

The Path Finder suite addresses the increasing design complexity of system on chip (SoCs) and multi-die packaging growth by providing the first new path-finding methodology that automates the planning, optimisation, and connectivity from a chip through multiple packaging variables, while targeting multiple and different PCB platforms.

Xpedition Path Finder provides designers with the ability to assemble and optimise complex electronic systems, and thereby enabling improved design, increased chip performance, and cost efficiency. This product, the newest addition to the Mentor Graphics Xpedition platform, supports a methodology that builds on layout data from IC and board design teams to guide and automate IC package selection and optimisation.

The Xpedition Path Finder suite provides a single environment that gives cross-domain design teams the ability to model every device/interface to the level of detail and accuracy they require. IC layout design data can be represented as a virtual die model (VDM), containing all of the IC-level detail specific to the co-design and optimisation process. Board design data can be modelled as individual interfaces or as complete designs. Packages can be built based on pin-array generation and manipulation capabilities, existing devices, and industry-standard formats. Cross-domain design teams can now make smart planning and optimisation decisions related to cost and performance of their IC package in context of the complete system.

Using the multi-mode connectivity environment, designers can capture and manage connectivity based on their preferred method; table-based, graphical schematics or automated. Cross-domain pin mapping and net combining can be managed in all modes of connectivity capture. In addition, users can perform rules-based pin/ball-out studies from their respective domains, by signal, bus or interface, visualising the impact across the complete system in real time. Path Finder also streamlines and automates the library development process, reducing a several-day task down to a few minutes.

The suite comprises a multi-mode connectivity engine and optimisation engine/editor, based on a physical layout tool with advanced routing technology. Features include: