Under the terms of the agreement, JVD will have access to MIE Labs technical design resources, giving JVD a greater range of design skills from which to service its growing demand for analog ASICs.
JVD's approach to ASIC design, called iASICs, shatters most conventional analog IC design methodology by embodying a full custom approach rather than using library-cell based solutions. iASICs create the smallest chips and thus guarantee customers the lowest total cost solution.
Access to the MIE Labs design resources not only gives JVD a physical presence on the East Coast, but also expands the company’s portfolio of design skills and capabilities.
“We look forward to working with the team at MIE Labs as they can now expand their portfolio offerings to include our San Jose based wafer probe facility,” said Mike VanDierendonck, JVD’s president. “We will also be managing their assembly and test requirements as those needs arise.”
Visit JVD at www.jvdinc.com
Visit MIE Labs at www.mielabs.com