Mobile designers are adding multiple high-definition cameras and displays, and are beginning to integrate 3-D technology. This increasing demand for bandwidth has driven the expansion of the D-PHY specification to include four-lane, 1.5 Gbs options. U4421A offers up to 16 GB of stimulus and analysis memory –— 2 to 5 orders of magnitude more than competing options — allowing designers to capture or simulate long sequences of high-definition traffic.
More significantly, the U4421A offers “raw mode,” a new feature that lets designers see the states that underlie the protocol. These states can be presented as a waveform or list, providing insight into why a packet isn’t being interpreted correctly.
The U4421A also offers image insertion and extraction software. The need to manage increased image traffic is the driving force behind mobile computing busses, and these packages simplify end-to-end image analysis. It’s even possible to use an internal loopback path to the analyzer to verify the traffic being sent to the target system.
The D-PHY exerciser option makes it possible to validate designs before components are available. Users can also change lane skew, signal voltages and slew rate, data rate, and protocol timing to test designs under a wide variety of conditions. This helps engineers optimize designs and make them more robust while minimizing power consumption.