Multi-output, 1.65-GHz clock buffer delivers low jitter to optimize noise performance in ultra-high-speed data converters

February 14, 2013 // By Paul Buckley
Analog Devices, Inc. has introduced a clock buffer and divider IC (integrated circuit) that combines high-speed, low jitter (41 fs across the 12-kHz to 20-MHz band) and selectable division capability.

The 1.65-GHz AD9508 clock buffer is designed for communications, instrumentation, defence and aerospace equipment that require ultra-high-speed data conversion with optimum SNR (signal-to-noise ratio) performance. The device has four dedicated output dividers with bus-programmable division (integers up to 1024) and phase delay, and automatic synchronisation.

The dividers also have pin-strapping capability for hardwired programming at system power-up. The AD9508 supports up to four differential, or eight single-ended outputs and three logic levels: LVDS (1.65 GHz), HSTL (1.65 GHz), and CMOS (250 MHz).

Availability and Pricing

The AD9508 clock buffer is now available packaged in a 24-lead LFCSP and is priced at $4.25 each in 1000 quantities.

More information about the AD9508 clock buffer at
www.analog.com/en/clock-and-timing/clock-generation-and-distribution/ad9508/products/product.html