The Laker³ platform provides an entirely new interactive and modernized software infrastructure for all OA-based Laker products, including the Laker Advanced Design Platform, Laker Custom Layout System, Laker Custom Digital Place and Route, as well as the new Laker Analog Prototyping tool. The platform fully supports multi-vendor design flows with Interoperable process design kits and third-party tool integrations. It provides early feedback on the impact of layout parasitics and other layout dependent effects which can be particularly challenging to manage at the 20nm node. Its unique capabilities enable automated constraint generation, layout exploration, and rapid implementation in a single flow.
The Laker3 platform is built on a performance-driven infrastructure with pervasive multi-threading, new ultra-fast drawing capabilities, and 2-10X faster read/write operations compared the Si2 OpenAccess reference implementation. It also features an updated graphical user interface (GUI) with modern conventions, such as window tabbing, dockable windows and Qt-based look and feel, for a more productive and 'personalized' user experience. The design entry, custom layout, custom digital place and route, and analog prototyping tools share the same binary executable creating a unified environment that enables passing of design intent between tools. This front-to-back flow is able to fully leverage the automation benefits of constraint-driven design, schematic-driven layout (SDL) and ECO flows in order to improve overall accuracy and user productivity.
A new DRC engine that addresses 20nm design rules is used by Laker automation tools and for rule-driven editing during layout. For layout editing with ‘sign-off’ rule decks, Laker uses the Mentor Calibre RealTime interactive DRC tool. In addition, beginning with this release, interoperable PyCells can now be used with all Laker automation features that previously supported only MCell parameterized devices.
The Laker Analog Prototyping tool is built directly into the Laker SDL flow to automate the process of analyzing advanced process effects and generating constraints to guide circuit layout. This rapid prototyping flow results in a more predictable design cycle and