The solution implements goHDR’s proprietary video codec algorithm into an Altera FPGA, enabling existing televisions to display HDR video content at real time rates – at least 25 frames per second. By using the OpenCL standard, goHDR was able to work entirely in a C-level environment and quickly perform multiple design iterations on their FPGA design.
Working closely with Altera, goHDR ported its proprietary C-code to the OpenCL standard and implemented the code in an FPGA in less than a week – a process that typically requires 3-6 months using a traditional HDL flow.
Combining Altera’s expertise in FPGA technology and goHDR’s in-depth high-dynamic range (HDR) knowledge, the two companies leveraged OpenCL as a common language which allowed goHDR to rapidly develop an HDR-enabled television solution.
“HDR video has very large data and computational requirements, creating significant challenges for video processing on such platforms as televisions or set-top boxes. FPGAs offer a very compelling alternative to traditional multicore CPUs and GPUs, but we were not experienced VHDL programmers,” said Alan Chalmers, innovation director at goHDR. “Altera’s OpenCL solution was a great fit for our HDR television applications, making them very easy to implement. Working with Altera’s OpenCL for FPGAs program, we were able to get our system up and running in less than a week and meet our project’s performance requirements with a limited amount of development time.”
goHDR provides advanced data compression algorithms to customers developing HDR technology. The encoding/decoding software developed by goHDR enables the adoption of HDR video across many sectors, including film and television, computer games, security and mobile devices.
Altera launched its OpenCL for FPGAs program in November 2011. As part of the program, Altera initiated work with early customers, academia and standards groups to define and develop an OpenCL for FPGAs solution. OpenCL for FPGAs combines the OpenCL parallel programming language with the parallel performance capabilities of FPGAs to deliver significantly higher performance compared