Designed for today's leading x86 motherboard and server systems, the Si5310x/11x/019 PCIe buffer family expands Silicon Labs’ PCIe timing portfolio with power-efficient fanout buffers. Available with a broad choice of output count options, the new PCIe buffers are qualified for use in 98% of x86-based server/storage motherboard designs.
Data centre equipment makers have had a limited supplier base for PCIe Gen3 buffers approved by the leading x86 CPU and chipset supplier. These conventional PCIe buffers are based on power-hungry constant-current output technology, which increases bill of materials (BOM) count by requiring four external termination resistors per output, as well as one reference resistor. As power consumption and cooling costs have become critical concerns for data centre designs, developers increasingly are seeking components that deliver the utmost energy efficiency while complying with stringent x86 board specifications. Silicon Labs’ Si5310x/11x/019 family provides equipment makers with lower power, standards-compliant PCIe buffer products qualified by the leading x86 CPU and chipset supplier.
More than 90% of existing motherboard designs use PCIe buffers based on constant-current output technology. To address this existing market need, Silicon Labs’ new Si53019 PCIe constant-current buffer delivers a fully qualified drop-in compatible solution with 30% lower power than conventional solutions.
To reduce power further, these devices use an innovative push-pull output architecture to deliver the lowest power family of PCIe buffers. These devices consume 60% less power than constant-current buffers while reducing the required number of external resistors per output. For example, by using Silicon Labs’ 19-output Si53119 push-pull buffer instead of a conventional constant-current device, developers can save nearly 1W of power and eliminate 39 external components.
Silicon Labs’ Si5310x and Si5311x push-pull output devices are also suitable PCIe timing solutions for system designs using ARM-based SoCs targeting the hyperscale server and storage markets. Similar to x86-based designs, ARM-based SoC platforms for the server and storage markets use PCIe as the primary system data bus and interconnect. With system-level