The MachXO2, says board developer Buglat, is a potent piece of silicon, with up to 6864 LUTs (depending of the PIF model), fifty-four 512x18 RAM blocks that can be driven in parallel, a PLL that can do fractional synthesis, hard coded I 2C, SPI, and Timer/Counter blocks, and 240 kbits of user Flash alongside the configuration Flash.
An onboard regulator powers the 3.3V FPGA from the RPi's 5V supply and there's a JTAG controller on the RPi I 2C bus through which you can recover a “bricked” (wrongly configured and non-functional) FPGA. The RPi SPI bus is used to to rewrite the FPGA's configuration flash memory. Both the SPI bus and the I 2C bus can read and write registers in the FPGA, so you can control the behaviour of your FPGA application logic.
Bugblat's Tim Eccles comments; “The Raspberry Pi is fairly potent with a 700MHz ARM-11 at its core and a powerful GPU. So what would an FPGA add? Peripheral interfacing is one example, adding I 2C and SPI ports, controlling specialised ICs, buffering and pre-processing the data from sensors, and precisely controlling output signals. Some of this can be done in a CPLD, but it's much easier in an FPGA. At the next level up, a modern FPGA with wide internal memories and lots of logic capability is just what you need for experimenting with cryptographic routines, developing your own CPU architecture, or designing novel signal processing algorithms. The PIF board tries to find the sweet spot where these capabilities are possible at a maker-friendly price.”
The MachXO2 is supported by Lattice Diamond, the compile plus place and route software package that is a free download from Lattice Semiconductor . The output from Diamond is a JEDEC file. Downloading the JEDEC to the FPGA's onboard Flash is the job of a Python program which is supplied with the PIF.
The PIF board comes