A power management chip for lower-power FPGAs/processors

May 19, 2016 // By Graham Prophet
This power management IC (PMIC) from Exar is the first the company has configured as a universal PMIC with three integrated synchronous MOSFET power stages, to give a compact design for FPGAs and SoC processors: it is configurable through I²C using PowerArchitect 4 design and configuration software

In a 4 x 4 mm package, the XR77103 features an I ²C interface to control output voltage (from 0.8V to 6V), switching frequency (from 300 kHz to 2.2 MHz), power sequencing, and current limit. The IC is supported by a new release of the PowerArchitect 4 design and configuration software.


The XR77103 operates from a 4.5V to 14V input supply and all three outputs are designed for 2A load currents with peak currents up to 3A. Since the device employs a current mode control architecture, outputs can be easily paralleled to provide up to a total of 5A allowing the XR77103 to power a range of low power processors. A selectable Pulse Skipping Mode (PSM) results in improved efficiency at light loads.


As the device supports up to a 2.2 MHz switching frequency and is packaged in a 4 x 4 mm QFN, it requires fewer and smaller external components. This family also includes two versions of the XR77103 which offer a fixed set of features for designers not requiring the I ²C interface. The XR77103ELB-A0R5 and –A1R0 are fixed at switching frequencies of 500 kHz and 1 MHz, respectively. Both products feature a 0.8V, high accuracy reference (1%) and their output voltages are set by external resistors.

Prices start at $1.95, $1.60 and $1.60, respectively, (all 1,000)


Exar; www.exar.com/products/power-management/universal-pmics/universal-pmics