Protocol exerciser for PCI Express 4.0

October 09, 2015 // By Graham Prophet
Offering traffic generation and analysis for PCIe 4.0 at data rates up to 16 GT/sec (transfers/sec). Teledyne LeCroy’s PCI Express (PCIe) protocol exerciser/analyser, the Summit Z416 exerciser/analyser can be used on devices with link widths up to 16 lanes.

In addition to traffic generation, protocol analysis featuring Teledyne LeCroy’s industry-standard CATC Trace and other traffic displays and data reports are available. The Summit Z416 supports exerciser functions that can be used for traffic generation and device/host emulation, as well as providing a platform for development of standardised compliance test suites. The Summit Z416 has error injection functions to enable developers to test error recovery routines. Along with the Summit Z416 Exerciser/analyser, a PCIe 4.0 test platform, PCIe 4.0 verification load board (VLB) and PCIe 4.0 verification base board (VBB) will be released to form a complete suite of protocol test tools for all developers working on or interested in PCI Express 4.0 products.

The Summit Z416 features a unified single application that incorporates traffic generation and protocol analysis. A protocol exerciser is an important part of protocol development and specification corner case testing. It provides realistic traffic to devices under test and can also emulate complex host- or device-side traffic while the protocol analyser acquires, records, decodes, analyses and displays complex high-speed PCI Express I/O streams. Users will have access to analysis and reporting capabilities. When analysers and exercisers are used together developers can create powerful script level traffic and monitor the results of all tests.

Teledyne LeCroy; teledynelecroy.com