Prototyping kit for Smart Connectivity designs uses FPGA dev kit

September 02, 2015 // By Graham Prophet
The ECP5 Versa Development Kit and Lattice Diamond Software are configured to support development on Lattice Semiconductor’s ECP5 family; low power consumption, small form factor and low cost FPGAs for flexible connectivity to ASICs and ASSPs.

ECP5 devices are targeted for small cells, microservers, broadband access, and industrial video: the ECP5 Versa development kit and Lattice Diamond software are being offered in a promotional offer for $99 for a limited time.

The ECP5 Versa development kit is intended to allow engineers to evaluate the connectivity performance of the ECP5 FPGA with a range of standards, including PCI Express, Gigabit Ethernet, DDR3 and generic SERDES. Lattice also offers several proof-of-concept demos with the ECP5 Versa development kit that can accelerate prototyping and testing. The kit includes the Lattice Diamond Design Software that offers a complete suite of FPGA design tools. The Lattice Diamond software suite tailored specifically for the ECP5 Versa kit will be available free of charge to all users purchasing the board.

“When we developed the ECP5 family, we broke all the rules of conventional FPGA approaches in order to deliver the optimum connectivity solution tailored to meet the demands of compact, low power, high volume communications and industrial applications,” said Deepak Boppana, director, product marketing at Lattice Semiconductor. “ECP5 devices have proven to be an ideal companion chip for ASICs and ASSPs. ”

Lattice optimised the ECP5 family’s architecture with the goal of delivering the best value below 100K LUTs, while adding key new features such as support for soft error correction, and small form factor packages across all densities. Claiming 40% lower cost than competing solutions, optimisations include small LUT4 based logic slices with enhanced routing architecture, dual-channel SERDES to save silicon real estate, and enhanced DSP blocks for up to 4x resource improvements.

Lattice Semiconductor;