Renesas specs 90-nm flash at 100million cycles for automotive SoCs

February 04, 2016 // By Graham Prophet
Renesas says its latest development, at 90-nm process rules, of its one-transistor MONOS flash memory technology is the first in the industry to achieve over 100 million program/erase cycles at high temperature, with rewrite energy of 0.07 mJ/8 kB: it will, the company says, be applied to accelerate intelligence in automotive control systems.

Renesas’ 90-nanometer (nm) one-transistor MONOS (Note 1) (1T-MONOS) flash memory technology can be used in combination with a variety of processes, such as CMOS and bipolar CMOS DMOS (BiCDMOS), and provides high program/erase (P/E) endurance and low rewrite energy consumption. Renesas anticipates that the new flash memory circuit technology will enable it to add flash memory to automotive analogue devices with improved performance and reliability. This circuit technology makes possible the industry’s first P/E endurance of over 100 million cycles under a high junction temperature (Tj) of 175°C, while also delivering low rewrite energy of 0.07 mJ/8 kB (millijoule: one thousandth of a joule) for low energy consumption.

Until now, says Renesas, it has not been possible to add flash memory to the automotive analogue and power devices that control the high-voltage (HV) drivers used for compact motors without changing the base process used to manufacture them. Therefore, storing data for optimising the performance of analogue circuits is typically addressed either by incorporating eFUSE technology or by employing external EEPROM chips. The newly developed flash memory technology limits additional process costs while providing an easy way to add flash memory to automotive analogue and power devices. This means that analogue circuits for connecting sensors and motors can employ devices that mix microcontroller (MCU) logic and flash memory based on the new technology. It has the potential to substantially reduce the number of chips used in motor control systems, while helping to make them more compact, lightweight, and power efficient.

With over 100 million P/E cycles, the memory will be suitable for applications such as automatic calibration or status recording using high-frequency sampling under actual usage conditions in the field. This has the potential to bring greater precision to automotive control and contribute to improved fuel economy.

The memory architecture combines FN tunnelling for P/E operations and high reliability; one-transistor memory cells that allow the mixing of processes with fewer additional