DS-5 is a high-end IDE from ARM, mainly designed for developing on and debugging ARM’s high-performance Cortex-A and Cortex-R processors, as well as Cortex-M series microcontrollers. The combination of the J-Link ULTRA+ and DS-5 offers download speeds of up to 3.0 Mbytes/sec, as well as allowing the user to set an unlimited number of breakpoints, even when debugging in flash memory.
Flash download technology of the J-Link is also covered by J-Link DS-5 support. This technology achieves a performance very close to the maximum possible programming speed of the flash while fully maintaining reliability. The Segger flash loaders also include a verification of each block written and final checksum verification to guarantee proper operation.
The Segger J-Link is tool chain independent and works with free GDB-based tool chains such as emIDE and Eclipse, as well as commercial IDEs from: ARM, Atmel, Atollic, Coocox, Cosmic, Freescale, IAR, Infineon, i-Systems, KEIL, Mentor Graphics, Python, Rowley, Renesas, Tasking and others. With the J-Link family, investments in the debug probe are preserved when changing compiler or even CPU architecture.
J-Link supports multiple CPU families, such as ARM 7, 9, 11, Cortex-M, Cortex-R, Cortex-A as well as Renesas RX100, RX200, RX600 and Microchip PIC32; there is no need to buy a new J-Link or new license when switching to a different yet supported CPU family or tool-chain.