Designers might be using, for example, more than one package of 128 Mbit serial NOR flash for this purpose; Toshiba suggests replacing that with a single package of 1 Gbit or larger, to store boot routines and other data, in all types of consumer and embedded products.
The new line-up spans densities of 1Gbit, 2Gbit and 4Gbit and are available in either SOP (10.3 x 7.5 mm) or WSON (6.0 x 8.0mm) packages. Each density / device combination is available with a choice of input voltage compatibility of either 1.8V or 3.3V.
High-speed sequential read functions, embedded ECC (Error Correction Code) with bit flip report function and embedded data protection features ensure data can be accessed quickly while being stored safely and securely. In particular, Toshiba highlights the bit-flip counter, a feature that is described as “essential for future controllers” and which it says is unique to the Toshiba parts. Block-level data protection (against being over-written) is by OTP cells.
While some SoCs will be built with IP that requires NOR-flash as boot source, while using NAND flash for data, Toshiba believes that future controller IP will routinely support NAND boot. The Serial Peripheral Interface enables the devices to be controlled using just six pins, giving users access to an SLC NAND flash memory with a low pin count, small package and large capacity. Serial Interface NAND has a much lower cost per bit than the NOR flash memory solutions traditionally used in embedded applications, through an overall reduces parts count. The device pinouts also allow simpler PCB tracking and layout.
Interface to the parts will be SPI (x1, x2, x4) Mode 0, Mode 3, clocked at up to 104 MHz. Program and erase times have yet to be released. IP protection will be assisted by unique device IDs.
With an operating temperature range of -40°C to +85°C the devices are suitable for the majority of consumer and industrial embedded