Signal processing development platform supports HWIL testing

September 16, 2015 // By Graham Prophet
RFEL’s qu-IQ Signal Processing Platform hosts a Xilinx Kintex 7 FPGA, a Xilinx Zynq 7045 System on Chip with a dual-core ARM A9 processor and 3 GB of on-board DDR3 memory on a PCIe 2.0 host card.

The qu-IQ platform supports a high-pin count FMC site supported by LVDS and GTX data lanes supporting data transfer rates of up to 180 Gbps. The PCIe Gen2x8 interface enables high rate DMA data transfers up to 24 Gbps to and from a host PC. Additional off-board connectivity and control is via Gigabit Ethernet and USB 2.0.

The qu-IQ features – on its two Xilinx configurable devices – 750k logic cells and nearly 2500 DSP48 slices, resource for the development and proving of signal processing applications. The module is supplied with an evaluation version of RFEL’s ChannelCore Flex IP core that provides rapid wideband channelisation out of the box:128 channels with real-time programmable response frequency, bandwidth and channel response as well as a powerful fractional rate resampler on each channel.

Dr Alex Kuhrt, RFEL’s CEO, explained, “We have drawn on all our years of expertise on creating state of the art, digital signal processing solutions on FPGAs to design this open development platform for prototyping and algorithm development, which is also targeted at Hardware-In-Loop (HWIL) testing. This will enable engineers to reduce their time to market and de-risk complex DSP development programmes for defence, security, military and industrial applications.”

The qu-IQ platform provides an off-the-shelf development environment that customers can use to experiment with RFEL’s IP, and rapidly create and test their own solutions. Areas of application include algorithm development and evaluation for COMINT, SIGINT, Electronic Warfare, Radar and Sonar, as well as high performance laboratory and industrial applications for Radio Astronomy and technical research.