Silicon Labs targets IoT’s security issues with low-power MCUs

December 15, 2015 // By Graham Prophet
Differentiating its EFM32 Jade and Pearl Gecko microcontrollers in the marketplace of MCUs for internet-of-things nodes, Silicon Labs cites the presence of hardware cryptography functions together with a range of low-power and sleep modes that, the company says, goes beyond what is offered by other ICs.

The hardware cryptography blocks add to the number of functions that the chip can perform without waking the ARM cortex M3/M4 cores from sleep; these include making measurements and carrying out communications operations, and are a cornerstone of the low-power claims made for the chips.

The two EFM32 Gecko microcontroller (MCU) families, Jade Gecko and Pearl Gecko, host a hardware cryptography engine, flexible low-energy modes, an on-chip dc-dc converter and scalable memory options; you program them in the company’s Simplicity Studio toolset where there are comprehensive features for energy management. EFM32 Jade and Pearl Gecko MCUs target an array of energy-sensitive and battery-powered devices including wearable health and fitness trackers, smart door locks, point-of-sale devices, security sensors and other IoT node applications.

Silcon labs says that Jade and Pearl Gecko MCUs address the growing need to equip IoT-connected devices with the advanced security technologies to thwart hackers. The hardware cryptography engine promises fast, energy-efficient, autonomous encryption and decryption for Internet security protocols such as TLS/SSL with minimal CPU intervention—and without sacrificing battery life. The on-chip crypto-accelerator supports advanced algorithms such as AES with 128- or 256-bit keys, elliptical curve cryptography (ECC), SHA-1 and SHA-224/256. Hardware cryptography enables developers to meet evolving IoT security requirements more efficiently than with conventional software-only techniques.

Based respectively on ARM Cortex-M3 and M4 cores, Jade and Pearl Gecko have what Silicon labs terms an enhanced peripheral reflex system (PRS) – this is a communications structure that allows peripheral functions to operate and exchange data without powering-up the core. It is controlled by a state-machine-like system that your code configures before the main core of the device enters deep-sleep mode: it is capable of simple logical decision making to extend the range of what can be done before restarting the ARM core. Low active-mode current (63 µA/MHz) enables computationally intensive tasks to execute faster. Low sleep-mode current (1.4 µA down to 30 nA) and ultra-fast wake-up/sleep