Other highlighted points include integration of three debugging apps that provide a single synchronised debug solution; and of an open debug platform with third-party support that enables multiple design and verification specialists to operate as a team to resolve system-on-chip bugs.
Indago claims to reduces the time to identify bugs in a design by up to 50% compared to traditional signal- or transaction-level debug methods. In addition to the debug platform itself, Cadence also announced three debugging apps that plug into the platform and can be used with other verification tools to provide a single integrated and synchronised debug solution for testbench, verification IP (VIP), and hardware/software debug for system-on-chip (SoC) designs.
Current debug methodologies used by designers require multiple simulation iterations to incrementally extract data points that ultimately point to the source of the bug. The technology in the Indago Debug Platform can reduce the human time necessary to resolve schedule-impacting bugs using a common set of resources that enable a suite of commercial and user-created Apps that automate the analysis of data from multiple verification engines and multiple vendors.
The three debug apps are:
• Indago Debug Analyzer: Extends root-cause analysis from e testbench (IEEE 1647) to SystemVerilog (IEEE 1800) and increases performance up to ten-fold.
• Indago Embedded Software Debug: Resolves bugs associated with embedded software applications by synchronising software and hardware source code debug
• Indago Protocol Debug: Visualises advanced protocols such as DDR4, ARM AMBA AXI and ACE using Cadence VIP for intuitive debugging
The Indago Debug Platform and debugging apps are part of the Cadence System Development Suite and are currently available for early adopters. General availability is expected by June 2015.