SoC design webinars aim to maximise power, performance & area from RTL

December 15, 2014 // By Graham Prophet
As the first in a series of webinars on design services, Dolphin Integration will present a live session on January 20 and January 22, 2015, focussing on services ranging from RTL-to-GDSII or RTL-to-Fab. The target audience is RTL designers, or project leaders in search for a partner to perform the physical implementation and optimisation of their designs.

Dolphin Integration's expertise from RTL-to-GDSII and RTL-to-Fab is based on 30 years of experience in integration services, more than 15 complex circuits taped-out each year, a network of partners for fabrication and its silicon IP portfolio. This webinar will highlight the good practices of P&R to get the best Power Performance and Area (PPA) from an RTL design.

By attending this webinar, Dolphin says, you will find out what the differences are between an automated P&R flow and a manually-driven design flow and the advantages and disadvantages of each. Topics include;

• Compromises available to maintain performances after P&R

• Relevance of dry runs to guarantee final performances

• Risk mitigation at final P&R with optimised scripts for implementation

Case studies will be presented which explore critical steps of the RTL-to-GDSII flow such as data acceptance, dry runs and testability insertion.

Registration is at;

Dolphin Integration offers silicon IP components based on libraries of standard cells, register files, memory generators and power regulators for flexible power supply networks. They provide power optimised micro-controllers from 8 to 32 bits, and high-resolution converters for audio and measurement applications.