Cadence Design Systems' Secure Digital (SD) 4.0 Host Controller Intellectual Property (IP) core allows designers to achieve the maximum memory card access performance of up to 312 MB/sec – 3-times the performance of the previous specification. The IP core is compliant with SD Specification Version 4.0 by the SD Association and is the fastest IP solution on the market, with support for Default Speed, High Speed and Ultra-High Speed Phase I (SDR12, SDR25, SDR50, SDR104, DDR50) as well as Ultra-High Speed Phase II (FD156 and HD312) modes, achieving connection speeds of 1.56Gbps and 3.12Gbps.
The core can support both removable and embedded memory devices. To achieve optimal performance, an advanced scatter-gather direct memory access (DMA) engine is integrated into the IP core along with configurable ping-ping data buffers and a dual-buffer option. To achieve low-power operation, the SD 4.0 Host Controller IP core is architected to allow users to independently switch on and off the master SD card clock and the memory card clock, thus saving power. Designed for ease of use and flexibility, the IP core has a standard AMBA AXI master interface for DMA operation and a separate AMBA AHB slave interface for CPU configuration. The SD 4.0 Host Controller IP core also supports standard Linux drivers for SD Host.
The SD standard is the most widely adopted interface in the consumer market, and is commonly used in applications such as cameras, mobile phones, tablets and general consumer products. As a critical component for the success of consumer products, file transfer times play an increasing factor in the customer experience, driving the need for faster speed and design innovation. The SD Specification Version 4.0 helps achieve optimal performance.