Synopsys expands scope of IP offering with design-in, customisation support

June 03, 2014 // By Graham Prophet
Synopsys is adding services and support products around its semiconductor IP product line; DesignWare IP development kits and customised subsystems accelerate prototyping, software development and integration of IP into SoCs

The IP Accelerated initiative augments Synopsys’ leading IP portfolio with new IP prototyping kits, software development kits and customised IP subsystems; DesignWare IP Prototyping Kits include a proven reference design for the IP preloaded onto a HAPS-DX prototyping system and a software development platform running Linux OS with reference drivers. DesignWare IP Virtual Development Kits are SDKs that include a processor subsystem reference design, a configurable model of the DesignWare IP as well as a Linux software stack and reference drivers.

- For hardware engineers, the IP Prototyping Kits provide a validated IP configuration that can be easily modified to explore design tradeoffs for the target application. They get fast IP bring-up and debug, they can easily modify stock reference designs and converge on the best performance soultion.

- For software developers, both the IP Virtual Development Kits and IP Prototyping Kits can be used as proven targets for early software development, bring-up, debug and test; they get early software bring-up, debug and test, can be working immediately with Linux support, and get system-wide debug and analysis, with standard tools sets and debuggers.

To reduce risk and accelerate time to market, Synopsys experts can assist designers in creating and customising IP subsystems for their specific application requirements as well as integrating the subsystems into their SoC.

Synopsys’ Virtual Prototyping Director of product marketing, Dr. Johannes Stahl, notes that the company has steadily grown its portfolio of IP over ten years, partly by internal development and partly by acquisition. But having the catalogue is now the minimum, he says; a higher level of support for the process or incorporating it into an SoC design is essential to offer a credible product line. Aslo required, Stahl, says, is a range of offerings that can address the various ways tha design teams prototype their projects, and the ways in which they facilitate early platforms for software development and hardware/software co-design.

Not only is the software content increasing, the IP itself is getting more complex, more IP blocks are being integrated and need to be optimised along with their context of clock, power and test circuitry. Users cannot treat IP as black-boxes; every piece of IP is parameterised and customised to some extent in every deployment, Stahl adds, and the designer must know how it works.

Part of Synopsys’ Accelerated initiative is to take existing prototyping tools and make them IP-specific. This has to be done for each piece of IP, “it is labour-intensive, but Sysnopsys has a team that is doing this work,” says Stahl – the change is from project-driven to more off-the-shelf. “For us, this is relatively straightforward.. we can leverage that effort and the customer has a starting point to do more protoyping. An IP prototyping kit includes a reference design, which is parameterised, a complete hardware kit (HAPS-based), a reference software stack, and a flow to support design iteration. Eliminating the early steps of adopting an IP block condenses the design cycle and save time measrued in weeks or more, Synopsys claims.

The company’s CoreConsultant tool is employed to assist with configuring IP – Synopsys believes that providing the support for this step to be done within the project is preferable to a service-based approach in which the IP vendor delivers optimised RTL – with multiple design iterations, this simply takes too long, Stahl says. He also notes a high number of downloads of the Virtual prototyping book “Better Software Faster” endorsing the company’s approach, and says that the ebook is now going into print.

IP Prototyping Kits, IP Virtual Development Kits and customised IP subsystems accelerate prototyping, software development and integration of IP into SoCs. Included are configurable models of the ARM Cortex-A57 core – Synopsys rsells ARM Fast Models. With the IP Accelerated initiative, Synopsys says it is going the traditional IP supplier model, redefining what customers can expect from their IP providers to help them successfully integrate IP with less effort, lower risk and faster time to market. Stahl terms it a, “Multi-year initiative into a broader role as an IP supplier.”