Offered free of charge, integrated to version 3.0 of the company's Stylus 3PLD design software, the DesignInsight technology is said to deliver unprecedented levels of real-time device observability.
The new tool is intimately tied to the Spacetime architecture as it relies on the ABAX’ dedicated configuration network which itself has access to every individual node of the design, able to write or read them separately and access data at 2 GHz (on the company’s latest 22nm ABAX2P1 devices). This gives designers 100% observability over the transactions taking place at every user logic node.
Assertions and conditional triggers can be set to buffer data from any given node in the design, pipelined through the configuration network.
The beauty of this solution is that users can observe signals in a production design operating at full speed without the need for recompilation or pre-declaration of target signals.
“This isn’t another Chipscope”, said Tabula’s Sr. Vice President and CMO Alain Bismuth, referring to Xilinx’ embeddable logic tracing tools. “If we have to set up debug logic points, we know where we’ll have issues, right? We would fix them before we ship.”
Typically in traditional FPGAs, 25 to 30% of user logic is dedicated to Quality-of-Service monitoring, Bismuth asserts. With a technology such as DesignInsight, engineers could either reduce their die-size or have more logic available.
Through the combination of a programmable trigger unit and a configurable 1.3 Mb trace buffer, users can observe any signal at full speed simultaneously over a maximum of 256 nodes in the design. The trace buffer can then be connected to any commercial visualisation tool to look deeper into the signal and identify any faults.
“We are working to add more capability, with simultaneous visibility over a thousand nodes by 2015”, commented Andrea Olgiati, responsible for developing DesignInsight.