Timing technology simplified for coherent optical systems

April 26, 2016 // By Graham Prophet
Silicon Labs has introduced a family of jitter-attenuating clocks that simplifies 100G/400G coherent optical line card and module design by providing a high-frequency, flexible clocking solution that significantly reduces system-level cost and complexity.

Si534xH coherent optical clocks replace discrete timing solutions that rely on expensive, large-footprint voltage-controlled SAW oscillators (VCSOs) to provide low-jitter reference timing for data converters. Unlike VCSOs that support single, fixed frequencies, these clocks operate over a wide frequency range, supporting frequencies up to 2.7 GHz without the need to change bill-of-material (BOM) components. The Si5344H and Si5342H clocks combine frequency flexibility with jitter performance of 50 fsec RMS. The devices simplify component sourcing, replacing multiple custom, long-lead time VCSOs with a clock IC solution available with short lead times. Featuring a jitter-attenuating PLL, high-frequency output drivers, fractional frequency synthesis and digitally controlled oscillator (DCO) technology, the Si534xH family provides all the clocking functions required for coherent optical transceiver applications while enabling 40% smaller footprint and 40% lower power than alternative solutions.

Silicon Labs notes that a driver in the communications market is the transition from 10G to 100G in metro area networks and data centre interconnect (DCI). Coherent optics is an enabling technology for 100G and 400G applications because it allows service providers to send more data over existing optical fibre, minimizing the cost and complexity of network upgrades for bandwidth expansion. Current timing solutions for coherent optics are not optimized for cost or size, requiring a diverse mix of VCSOs, clock generators and discrete components.


Silicon Labs designed the Si534xH clocks to address the timing requirements of 100G/400G coherent optics. In addition to supporting the ultra-high frequency synthesis necessary for clocking optical transceiver data converters, the Si534xH clocks combine Silicon Labs' DSPLL jitter attenuation technology and MultiSynth low-jitter fractional frequency synthesis technology to deliver a single-chip solution. All 100G/400G transmitter or receiver clocks can be generated by a single device, minimizing BOM cost and complexity by eliminating the need for numerous discrete components.


Silicon Labs supports coherent clock development with ClockBuilder Pro, a software tool that simplifies clock tree design, device configuration and detailed performance evaluation.