TSV technology has been explored for many years as an alternative to wire bonding (on their edges) of silicon dice placed one on top of another. Silicon from thinned wafers has vias ‘drilled’ completely through, which are then filled with metal to provide connectivity from the diffused side to the back side of the die. Dice of the same dimensions can be stacked, whereas with wire bonding a pyramidal stack is needed to gain access to each die’s periphery.
Toshiba’s announcement indicates it has overcome the challenges of producing multi-die stacks in the way, although it does not indicate when, or if, it plans to introduce product based on the tehcnology. The announcement comes only shortly after a high-density-flash disclosure ( here) that described building dense memories with a monolithic, layered 3D cell approach.
TSV technology’s use of vertical electrodes and vias to pass through the silicon dice enables, Toshiba says, high-speed data input and output, and reduces power consumption. Toshiba’s TSV technology achieves an I/O data rate of over 1 Gbps which it says is higher than any other NAND flash memories with a low voltage supply: 1.8V to the core circuits and 1.2V to the I/O circuits and approximately 50% power reduction (compared to the company’s current flash product) of write operations, read operations, and I/O data transfers.
This new NAND flash memory provides, Toshiba concludes, the ideal solution for low latency, high bandwidth and high IOPS/W in flash storage applications, including high-end enterprise SSD.