Ultra-low power process technology for IoT and wearable-device SoCs from TSMC

September 30, 2014 // By Graham Prophet
TSMC has announced what it describes as the silicon foundry sector's first ultra-low power technology platform aimed at a wide range of applications for the Internet of Things (IoT) and wearable device markets that require a wide spectrum of technologies to best serve these diverse applications.

In this platform, TSMC offers multiple processes to provide significant power reduction benefits for IoT and wearable products and a comprehensive design ecosystem to accelerate time-to-market for customers.

TSMC's ultra-low power process lineup expands from the existing 0.18-micron extremely low leakage (0.18eLL), 90-nanometer ultra low leakage (90uLL) nodes and 16-nanometer FinFET technology to new offerings of 55-nanometer ultra-low power (55ULP), 40ULP and 28ULP, which support processing speeds of up to 1.2GHz. The wide spectrum of ultra-low power processes from 0.18-micron to 16-nanometer FinFET is suited for a variety of smart and power-efficient applications in the IoT and wearable device markets. Radio frequency and embedded Flash memory capabilities are also available in 0.18 µm to 40 nm ultra-low power technologies, enabling system level integration for smaller form factors as well as facilitating wireless connections among IoT products.

Compared with their previous low power generations, TSMC's ultra-low power processes can further reduce operating voltages by 20% to 30% to lower both active power and standby power consumption and enable significant increases in battery life - by 2X to 10X - when much smaller batteries are demanded in IoT/wearable applications.

“This is the first time in the industry that we offer a comprehensive platform to meet the demands and innovation for the versatile Internet of Things market where ultra-low power and ubiquitous connectivity are most critical,” said TSMC President and Co-CEO, Dr. Mark Liu.

Users accessing the ultra-low power technology platform can use TSMC's existing IP ecosystem through the Open Innovation Platform. Designers can re-use IPs and libraries built on TSMC's low-power processes for new ultra-low power designs to boost first-silicon success rates and to achieve fast time-to-market product introduction. Some early design engagements with customers using 55ULP, 40ULP and 28ULP nodes are scheduled in 2014 and risk productions are planned in 2015. [Risk production is TSMC's term for early production prior to full release to stable, volume production.]

“TSMC's new ultra-low power