Supporting a wide operating voltage range of 0.7-1.2V, the Single Port SRAM claims dynamic power savings exceeding 50% of current commercial offerings. The new IP also cuts static power by up to 35% with only a modest 10% area penalty.
sureCore's 28 nm, ultra-low power, FDSOI (fully-depleted, silicon-on-insulator) SRAM IP is the first product on a roadmap that includes the introduction of a 40 nm, bulk CMOS, ultra low-power SRAM later in 2015. Work is also under way on a 28 nm, bulk CMOS configuration.
Embedded memory has become increasingly prevalent in modern SoC designs to support multiple processors running numerous software applications. Historically, however, SRAM has proven extremely power hungry. sureCore's ultra-low power SRAM dramatically cuts both dynamic and static power through its patented suite of advanced circuit design techniques. SureCore says its SRAM IP technology is particularly attractive for developers of wearable electronics and Internet of Things (IoT) applications where extending battery life is crucial. The IP also provides considerable value in the networking space where power and heat dissipation are critical considerations.
"As the semiconductor industry addresses many diverse leading-edge applications ranging from Wearables to IoT to Cloud Computing, and even Automotive, the key challenges to the creation of both innovative and commercially competitive products are going to be power consumption, heat dissipation and battery life. sureCore is dedicated to minimising both dynamic and static power to help bring the promise of these technologies to fruition," explained Paul Wells, sureCore CEO.
"Because of migration costs, there is still considerable innovation happening at relatively mature production nodes," said sureCore's Chairman, Guillaume d'Eyssautier. "These nodes are predicted to have extended longevity and strategically we felt it important to provide groundbreaking solutions for these nodes so this is where we have focused our road map."