UltraSoC lends debug to open-source ISA RISC-V

September 21, 2016 // By Graham Prophet
UltraSoC, the Cambridge, UK-based provider of semiconductor IP for on-chip analytics, performance optimization and hardware-based security, today announced that it will provide support within its universal system-on-chip (SoC) debug solution for products based on the RISC-V open-source instruction architecture (ISA).

The company is also lending its support to the RISC-V Foundation, the non-profit corporation that directs the development and drives the adoption of the RISC-V ISA, which some commentators believe will evolve to be “the Linux of the semiconductor industry”.


RISC-V was originally designed to support computer architecture research and education, but as concern has grown in the industry about the increasing dominance of one or two proprietary microprocessor architectures, the RISC-V ISA has aroused interest as a potential open architecture for commercial use. A strong development and debug infrastructure is essential to the success of any chip architecture, and UltraSoC’s vendor-neutral, partnership-based approach, the company believes, complements the RISC-V open ISA principles.


“RISC-V has attracted the interest of leaders like Google and HP,” said David Kanter of The Microprocessor Report. “The open-source nature of RISC-V is novel, and gives many companies a new opportunity to innovate with specialized hardware components for emerging applications. As with any processor architecture, the RISC-V ISA needs many complementary software and hardware elements to create a full solution. Advanced, vendor-neutral development, debug and analytics support is essential. As such, the participation of specialist firms like UltraSoC is an important step for the RISC-V community”.


“We are delighted to welcome UltraSoC to the RISC V community,” said Rick O’Connor, Executive Director of the RISC V Foundation. “With the Foundation we are building a complete eco-system: end users, processor architects, tools vendors and supporting components. UltraSoC’s debug and development tools will be a great addition to the community.”


UltraSoC adds that its silicon IP and software tools will provide the RISC-V community with secure, independent on-chip capabilities that non-intrusively monitor and analyze the device’s internal behavior. These features speed development and reduce risk for chip designers both pre- and post-silicon. They ease the often complex task of writing and debugging software for complex devices, and allow robust hardware-based security features that can detect unexpected behaviour caused by bugs or by malicious interference (Bare Metal Security). UltraSoC is compatible with open-source design automation tools such as GDB, as well as a wide variety of commercial third-party products from leaders such as Lauterbach and Teledyne LeCroy.


UltraSoC; www.ultrasoc.com


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