Ultrasoc's debug support is inherently manycore-aware and comes as a tool box with about 30 different debug functions supported by a number of cores. To this the company has added active functions such as support for scheduling and security awareness. The typical overhead in terms of gates as a proportion of the total for an IC varies between about 1 and 7 percent.
The flexibility and diversity of this IP helps Sondrel add value across design projects from the debug and validation of complex SoCs to the provision of system-level security functionality in IoT ICs.
"We are always looking to improve performance margins for our customers, whilst maintaining the quality and reliability of a design," said Kevin Steptoe, vice president of engineering at Sondrel, in a statement issued by Ultrasoc. "In implementing this IP, it has the capability of not only maintaining reliability, but monitoring and improving it."
Related links and articles: