Serial data link analysis applications allow the user to load circuit models for the measurement circuit, which includes the test and measurement fixtures and instruments used to acquire waveforms from the DUT. This allows the loss and reflections caused by fixtures and test equipment such as the probe and scope to be de-embedded from the acquired waveforms. De-embedding these effects improves the accuracy of measurements and can make the difference between passing and failing a test. In addition, link analysis applications allow the user to define the simulation circuit by loading channel models for the serial data link system in order to evaluate performance without the need for actual link hardware to be present.
A typical usage scenario would be to acquire waveforms through fixtures from an actual transmitter circuit that is to be evaluated. This allows for observation of waveforms out of the transmitter with the measurement circuit removed, and with an ideal load simulated. Also, the serial data link simulated models can be connected to the transmitter (TX) to evaluate the signal at the far end and the receiver (RX) model can be modelled using CTLE equalisation, FFE/DFE equalisation, or the RX IBIS-AMI model. The signal can then be simulated at any test point within the link resulting in the output of live waveforms that can be used in other applications for to measure signal quality, including jitter and eye diagram analysis.
An example of such a modelling setup is shown in Figure 1. The system acquires input waveforms from the oscilloscope and applies a transfer function to the acquired signal to obtain test point waveforms. These test points allow the user to view the waveform at any point in the link and appear as live waveforms on the oscilloscope display.
Ensuring adequate test margins
With data rates moving to from 5 Gb/sec to 10 Gb/sec and beyond, every picosecond and millivolt count to ensure that adequate margins