Working with DRAM, up to DDR4 – Training course/Copenahgen

September 03, 2014 // By Graham Prophet
Signal integrity and analysis specialist consultants EKH – EyeKnowHow has added a second date in Copenhagen for its two-day DRAM Training Course “Open the Black Box of Memory”. The first date (24th/25th September) has sold out and the course will run again on the 22nd and 23rd.September 22nd 2014.

EKH has added the additional event for the “Open the Black Box of Memory” DRAM Training event; in order to keep the quality of the event high the number of participants is limited, hence the extra date. The content promises to reveal, “What you always wanted to know about Memory, but never had the right expert to ask.”

The training, which will be conducted in English, covers in-depth technical information on DRAM Memory that engineers need for Design, Layout, Verification and Failure analysis on DRAM interfaces from DDR1 up to DDR4. The training is done in cooperation with Danish company ee-training. Register with that link and use the promotion Code EK3232 when registering for the event to get a discount!

EKH – EyeKnowHow is run by signal integrity specialist Hermann Ruckerbauer, who says, of DRAM, that is doesn't matter which processor platform you use: DRAM Memory is part of nearly all designs. But the functionality behind the memory is often unknown. The layout is done following the design guide. But without some background knowledge it is difficult to judge what impact required deviations from the design guide will have. The BIOS to access the memory is taken from the CPU vendor, with few options to look inside or even make adjustments. This makes troubleshooting quite difficult; the memory interface is becoming more and more of a “Black Box”.

With every new memory generation the margins are getting smaller and the requirements for the design are increasing.

The seminar topics span;

DRAM inside: What’s inside the components?

Basic commands: How to access the DRAM?

ECC: How does it work and how to test it?


AC/DC: “Highway to Hell” ? Alternating Current / Direct Current?

Derating ... ?

Application test for Memory

SPD Content

Routing and Layout: Real world implementation

DDR2 vs. DDR3 vs. DDR4: The most important differences!

Signal Integrity: How to simulate signals?

Power Integrity: Can the components