JESD204B interoperability has been confirmed between the Xilinx JESD204 LogiCORE IP deployed in the Kintex-7 FPGA, and the ADI AD9250 analogue-to-digital high-speed data converter.
Transition to the high-speed transceiver based JESD204B standard opens up possibilities for improving system performance in communications equipment. JESD204B offers manufacturers higher level system integration, deterministic latency capability, easier multi-channel synchronisation, smaller and lower-cost device packages, reduced PCB complexity and cost, and better system modularisation.
“Interoperability testing between Xilinx FPGAs and ADI data converters.... will reinforce industry confidence in this emerging high-speed converter interface,” said Dave Babicz, director, Global Alliances, Analog Devices.
Developed by the JEDEC standards organization, the JESD204B specification overcomes connectivity limitations between the logic device and the multiple data converter devices used in multi-mode wireless radios, wideband backhaul modems, ultrasound monitors and other high performance equipment. JESD204B eliminates the connectivity bottleneck, complexity and improves system performance while lowering cost.
The joint interoperability lab testing validated JESD204B subclass 0 and subclass 1 (deterministic latency) functionality by running a comprehensive set of tests between the Xilinx Kintex-7 XC7K325T FPGA and ADI’s AD9250 device. Read the complete JESD204B Xilinx/Analog Devices AD9250 interoperability report here.
Xilinx JESD204 LogiCORE IP is soft IP that supports continuous line rates from 1 Gb/sec to 12.5 Gb/sec on 1, 2, 3, 4, 5, 6, 7, or 8 lanes using GTX or GTH transceivers in Zynq-7000, Kintex-7 and Virtex-7 28nm devices and GTP transceivers in the 28nm Artix-7 FPGA family. Xilinx JESD204B IP can be configured as a transmitter or receiver and supports transceiver sharing between a transmitter and receiver link.
Analog Devices AD9250 is at; www.analog.com/AD9250