Xilinx dynamic reconfiguration offers compute efficiency gains

November 15, 2016 // By Graham Prophet
Intended to accelerate mainstream adoption of Xilinx FPGAs in hyperscale data centres, the company has disclosed technology designed to enable the world’s largest cloud service providers to rapidly develop and deploy acceleration platforms.

Designed for cloud scale applications, the FPGA-powered Xilinx Reconfigurable Acceleration Stack includes libraries, framework integrations, developer boards, and OpenStack support. It provides the fastest path to realize 40x better compute efficiency with Xilinx FPGAs compared to x86 server CPUs and up to six times the compute efficiency over competitive FPGAs. Using dynamic reconfiguration, Xilinx enables silicon optimization for the broadest set of performance-demanding workloads including machine learning, data analytics, and video transcoding. These workload optimizations can be done in milliseconds by swapping in the most optimal design bitstream. Xilinx attributes the 2-6x the compute efficiency in machine learning inference to DSP architectural advantages for limited precision data types, and greater on-chip memory resources.

The Xilinx Reconfigurable Acceleration Stack includes math libraries designed for cloud computing workloads, application libraries integrated with major frameworks, such as Caffe for machine learning, a PCIe-based development board and reference design for high density servers, and an OpenStack support package making Xilinx FPGA-based accelerators easy to provision and manage.

 

The Xilinx Reconfigurable Acceleration Stack is available to major cloud service providers.

 

Xilinx Acceleration Zone; www.xilinx.com/accelerationstack