As is invariably the case with the newest and largest of any generation of FPGA, first shipment of the Virtex UltraScale VU440 FPGA are likely t be used in ideal for next-generation ASIC and complex SOC prototyping and emulation.
Also claiming the highest I/O count of any programmable device, the Virtex UltraScale VU440 FPGA exploits the UltraScale architecture’s ASIC-like clocking, next-generation routing, and logic block enhancements to deliver higher utilisation, making it ideal for ASIC prototyping and large scale emulation.
“[With] samples of the Virtex UltraScale VU440 device, we are able to accelerate HAPS FPGA-based prototyping development to ensure the earliest availability of a complete solution for our customers,” said John Koeter, vice president of marketing for IP and prototyping at Synopsys. “The new UltraScale devices combined with HAPS’ unique capabilities enable us to deploy our next-generation prototyping systems … for higher capacity, increased performance and easier integration.”
The Virtex UltraScale VU440 FPGA uses Xilinx’ second generation SSI-technology. Production qualified at the 28nm node, the SSI technology is built on TSMC's CoWoS (Chip-on-Wafer-on-Substrate) 3D IC process to achieve even greater silicon scaling, as well as power and performance benefits by integrating multiple components on a single device. Sometimes referred to as 2 ½-D, the construction places active dice side-by-side on a silicon interposer or carrier. Along with 5X more inter-die bandwidth and a unified clocking architecture across slice boundaries, UltraScale 3D IC devices deliver a “virtual monolithic design experience”, Xilinx says, for fast implementation and design closure.
“The VU440 is a powerful vehicle for prototyping any type of ARM®-based SoC prior to tapeout,” said John Goodenough, vice president of engineering systems at ARM. “The capacity and performance of this new FPGA from Xilinx enables multicore prototyping of even the most advanced ARMv8-A architectures, improving hardware and software development schedules, thereby enabling faster time to market for next-generation SoCs.”
The Virtex UltraScale VU440 has 4.4million logic cells, 1,456 user