“Bridge-chip” and I/O-function FPGAs gain on-chip flash memory

May 12, 2015 // By Graham Prophet
The newest generation of Lattice’s non-volatile, instant-on MachXO3 FPGA line provides advanced, low-cost-per I/O bridging and I/O expansion.

With the MachXO3 family, users now have multiple footprint compatible options: the MachXO3L device, which offers low-cost reprogrammable non-volatile configuration memory (NVCM), and now the MachXO3LF device with Flash memory. MachXO3LF is the newest member of the MachXO3 FPGA family, which essential bridging and I/O expansion functions to meet the increasing connectivity requirements of communications, computing, consumer and industrial markets.

MachXO3LF devices come with on-chip Flash for configuration and usage. They use the same package technology as the MachXO3L family, providing a small-footprint and the highest I/O density of any device on the market. The pin-out compatibility allows users to migrate between MachXO3L and MachXO3LF devices without changing printed circuit board design. With the MachXO3LF devices, designers can get the benefit of FPGA design code changes during the engineering and development phase or during in-field design upgrades, and then migrate to lower cost MachXO3L devices when the design is finalised. The new MachXO3LF devices are immediately supported by Lattice Diamond design software version 3.4.1 (and follow-on versions).

The MachXO3 FPGA family claims lowest-cost per I/O, a small footprint, low power usage, high I/O count, high I/O density, with low cost NVCM or Flash options for programming and configuration.

Lattice Semiconductor; www.latticesemi.com