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Novel measurement circuit eases battery-stack-cell design

A TRANSFORMER AND DIODE ON EACH CELL ALLOW ISOLATED MEASUREMENT.

Automobiles, aircraft, marine vehicles, uninterruptible power supplies, and telecom hardware use series-connected battery stacks. These stacks of individual cells may contain many units, potentially reaching hundreds of volts. In such systems, it is desirable to accurately determine each individual cell’s voltage. Obtaining this information in the presence of the high common-mode voltage that the battery stack generates is more difficult than you might suppose.

The “battery-stack problem” has been around for a long time. Its deceptively simple appearance masks a stubborn problem. Designers have tried various approaches to isolated-cellvoltage measurement with varying degrees of success (see sidebar “Some battery-cell-measurement techniques just don’t work”).

Figure 1’s voltmeter measures a single-cell battery. Beyond the obvious benefits, the arrangement works because no voltages other than the single cell lie in the measurement path. The ground-referred voltmeter encounters only the voltage it is measuring.

Figure 2’s stack of series-connected cells is more complex. The voltmeter must switch between the cells to determine each cell’s voltage. Additionally, the voltmeter, normally composed of relatively low-voltage breakdown components, must withstand input voltages relative to its ground terminal. This common-mode voltage may reach hundreds of volts in large series-connected battery stacks, such as those in an automobile. Such high-voltage operation is beyond the voltagebreakdown capabilities of most practical semiconductor components, particularly if the application requires accurate measurement. The switches present similar problems. Attempts at implementing semiconductor-based switches encounter difficulty due to voltage-breakdown and leakage limitations. A practical method is necessary that would accurately extract individual cells’ voltages and reject common-mode voltages. This method should not draw any battery current and should be simple and economical.

Figure 3’s concept addresses these issues. To determine battery voltage, VBATTERY, a pulse excites a transformer, T1, and records its primary clamp voltage after settling occurs. The diode and the battery-voltage shunt primarily set this clamp voltage and similarly clamp T1’s secondary. The diode and a small transformer term are predictable errors, and the circuit’s final stage substracts them out, leaving the battery voltage as the output.

DETAILED CIRCUIT OPERATION

Figure 4 details the transformer-based sampling voltmeter. It closely follows Figure 3 with some minor differences, which this article later describes. The pulse generator produces a 10-µsec-wide event (Trace A, Figure 5) at a 1-kHz repetition rate. The pulse generator’s low-impedance output drives T1 through a 10-kΩ resistor and triggers the delayed-pulse generator. T1’s primary, Trace B, responds by rising to a value representing the sum of the diode voltage and the battery voltage, along with a small fixed error that the transformer contributes. T1’s primary becomes clamped at this value. After a time, the delayed pulse, Trace C, generates a pulse, Trace D, closing S1, allowing C1 to charge toward T1’s clamped value. After a number of pulses, C1 assumes a dc level identical to the voltage on T1’s clamped primary. A1 buffers this potential and feeds differential amplifier A2. A2, operating at a gain near unity, subtracts the diode- and transformer-error terms, resulting in a direct reading of battery-voltage output.

Accuracy critically depends on transformer-clamping fidelity over temperature and clamp-voltage range. The carefully designed, specified transformer yields Figure 6’s waveforms. Primary, Trace A, and secondary, Trace B, clamping details appear at a highly expanded vertical scale. Clamping flatness is within millivolts; trace-center aberrations derive from S1-gate feedthrough. Tight transformer-clamp coupling promotes good performance. Circuit accuracy at 25C is 0.05% over a 0 to 2V battery range with 120 ppm/C drift, degrading to 0.25% at a battery voltage of 3V. Designers of this circuit used a floating variable-potential battery (see sidebar “Floating-output, variable- potential battery simulator”).

Several details aid circuit operation. The circuit substitutes the transistor’s base-emitter voltage for diodes, providing more consistent initial matching and temperature tracking. The 10-ΩF capacitor at Q1 maintains low impedance at frequency, minimizing cell-voltage movement during the sampling interval. Finally, synchronously switched Q2 prevents T1’s negative-recovery excursion from deleteriously influencing S1’s operation.

This approach’s advantage is that its circuitry does not encounter high common-mode voltages; T1 galvanically isolates the circuit from common-mode potentials associated with the battery voltage. Thus, you can employ conventional lowvoltage techniques and semiconductors.

MULTICELL VERSION

The transformer-based method is inherently adaptable to the multicell-battery-stack-measurement problem. Figure 7’s conceptual schematic shows a multicell-monitoring version. Each channel monitors one cell. You can read any channel by biasing its appropriate enable line to turn on a FET switch, enabling that channel’s transformer. The hardware for each channel typically includes only a transformer, a diodeconnected transistor, and a FET switch.

AUTOMATIC CONTROL AND CALIBRATION

This scheme suits digital techniques for automatic calibration. Figure 8 shows pulse generators, calibration channels, and measurement channels, which feed Figure 9’s PIC- 16F876A microcontroller. As before, even though the cell stack may reach hundreds of volts, the transformer’s galvanic isolation allows the signal-path components to operate at low voltage. The design includes an automatic calibration-circuit microcontroller and reset sections (Figure 9) and an automatic calibration-circuit USB interface for development only (Figure 10).

A further benefit of processor-driven operation is the elimination of Figure 4’s base-emitter-voltage diode-matching requirement. In practice, engineers tested a processor-based board at room temperature with known voltages at all input terminals. They then read the channels, which furnished the information necessary for the processor to determine each channel’s initial base-emitter voltage and gain. The engineers then stored these parameters in nonvolatile memory, permitting a one-time calibration that eliminates both base-emitter-voltage-mismatch- and gain-mismatchinduced errors.

Channels 6 and 7 provide 0 and 1.25V reference voltages, representing cell-voltage extremes. The room-temperature values reside in nonvolatile memory. As temperature changes occur, you use readings from channels 6 and 7 to calculate a change in offset and a change in gain that you apply to the six measurement channels. The calibration continues as temperature varies because each channel’s -2-mV/°C base-emittervoltage- drift slopes are nearly identical. Similarly, gain errors from channel to channel are nearly identical.

Because you are continuously calibrating the gain and offset, those of the LTC1867 drop out of the equation. The only points that must be accurate are the 1.25V reference voltage, which an LT1790-1.25 IC provides, and the 0V measurement, which is easy: Just short the Channel 6 inputs together. The LTC1867 internally amplifies its internal 2.5V reference to 4.096V at the reference-comparator pin, which sets the full scale of the ADC: 4.096V for unipolar mode and 2.048V in bipolar mode. Thus, the absolute maximum cell voltage that you can measure is 3.396V. And, because the offset measurement is nominally 0.7V at the ADC input, it is never in danger of clamping at 0V. A 0V reading results if the LTC1867 has a negative offset and the input voltage is any positive voltage less than or equal to the offset. Accuracy of the processor- driven circuit is 1 mV over a 0 to 2V input range at 25°C. Drift drops to less than 50 ppm/°C—almost three times lower than that in in Figure 4.

The complete firmware code, Listing 1 is available with the Web version of this article at www.edn-europe.com/article. asp?articleid=2044. The code for this circuit is a good starting point for an actual product. Data appears on a PC screen through an FTDI (Future Technology Devices International, www.ftdichip.com) FT242B USB-interface IC. The PC has FTDI’s virtual-communications-port drivers installed, allowing control through any terminal program. Data for all channels continuously appears on the terminal, and simple text commands control program operation.

A timer interrupt occurs 1000 times per second. It controls the pulse generators and ADC and stores the ADC readings in an array that you can read at any time. Thus, if the main program is reading the buffer, the reading is never out of date by more than 1 msec.

The software also includes automatic calibration routines. Two functions store a zero reading and a full-scale reading for all channels, including the calibration voltages you apply to channels 6 and 7, to nonvolatile memory. You subsequently use these functions to calibrate out the initial gain and offset errors, as well as the temperature-dependent errors. The entire procedure is to apply 0V to all inputs and issue a command to store the zero calibration, then apply 1.25V to all inputs and issue a command to store the full-scale calibration. Note that this procedure is no more complicated than a basic performance test that would be part of any manufacturing process. The 1.25V factory-calibration source can be from a voltage calibrator or from a selected LT1790-1.25 that you keep at a stable temperature.

The software also includes a digital filter for testing purposes. The filter is a simple exponential IIR (infinite-impulseresponse) filter with a constant of 0.1. This filter reduces the noise in the readings by a factor of the square root of 10.

MEASUREMENT DETAILS

To take a reading from a given channel, the processor must apply the excitation to the transformer, wait for the voltage signal to settle out, take a reading with the ADC, and then remove the excitation. To perform these tasks, an interruptservice routine occurs once every millisecond. For the details, see Listing 1. Figure 11 shows the digital signals, excitation pulse, and clamp voltage at the ADC input along with the C code that performs these operations. Loading a 3-bit byte high into the 74HC574 latch enables individual channels.

Note that you apply the excitation after 8 bits of the LTC1867 data are read out. This situation is perfectly acceptable, because no conversion is taking place, and all of the data in the LTC1867 output register is static. Depending on the timing of the processor you use, you can apply excitation before reading any data, in the middle of reading data, or after reading the data but before initiating a conversion. If the serial clock is slow—1 MHz, for instance—applying excitation before reading any data would result in the excitation being applied for 16
sec, which is too long. The only constraints are that the voltage at the ADC input must have enough time to settle properly and that you do not leave the excitation on for too long. Figure 12 shows the same signals over the entire interrupt-service routine. Similar analog signals are at each transformer and the other LTC1867 inputs.

Many ways exist to add channels to this circuit. Figure 13 shows a 64-channel concept that decodes the 64 channels into eight banks of eight channels using 74HC138 address decoders. The selected bank corresponds to one LTC1867 input that is programmed through the SPI. Some 8-to-1 74HC4051 analog switches perform the additional analog multiplexing. A single 74HC4051 feeding each LTC1867 input gives 64 inputs. The LTC1867, rather than a singlechannel ADC, is still a great choice in high-channel-count applications, because it is good idea to break up multiplexer trees into several stages to minimize total channel capacitance. The LTC1867 takes care of the last stage. With a maximum sample rate of 200k samples/sec, it can digitize as many as 200 channels at the maximum 1k-sample/sec limitation of the sense transformer. That’s a lot of batteries.

 

FLOATING-OUTPUT, VARIABLE-POTENTIAL BATTERY SIMULATOR

A floating-output, variable-potential battery simulator can help in the development of a battery-stack-voltage monitor. This capability permits accuracy verifi cation over a wide range of battery voltage. You can substitute a floating battery simulator for a cell in the stack and directly dial out any desired voltage. Figure A’s circuit is simply a battery-powered follower, A1, with currentboosted output at A2. The specified LT1021 reference and high-resolution potentiometric divider permit accurate output settling within 1 mV. The composite amplifier unloads the divider and drives a 680-µF capacitor to approximate a battery. Diodes preclude reverse-biasing the output capacitor during supply sequencing, and the 1-µF-capacitor/ 150-kΩ-resistor combination provides stable loop compensation. Figure B depicts loop response to an input step; no overshoot or untoward dynamics occur despite A2’s huge capacitive load. Figure C shows battery-simulator response (Trace B) to Trace A’s transformer clamp pulse. Closed-loop control and the 680- F capacitor limit simulator- output excursion within 30 µV. This error is so small that it requires noise-averaging techniques and a high-gain-oscilloscope preamplifi er to resolve it.

 

SOME BATTERY-CELL-MEASUREMENT TECHNIQUES JUST DON’T WORK

The so-called battery-stack problem has been around for a long time. Designers have tried various approaches with varying degrees of success to solve it. The problem appears deceptively simple; technically and economically qualifi ed approaches are notably elusive. The following paragraphs present typical candidates and their difficulties. Figure A presumably solves the problem by converting cell potentials to current, obviating the high common-mode voltages. Op amps feed a multiplexed- input ADC; the decoded ADC output presents cell voltages. This approach has serious fl aws. First, the required resistor precision and values are unrealistic, and they become progressively more unrealistic as the number of cells in the stack increases. Additionally, the resistors drain current from the cells, a distinct and often unallowable disadvantage. Figure B shows an isolation- amplifi er-based approach. Isolation amplifi ers feature galvanically floating inputs that are fully isolated from their output terminals. Typically, the device contains modulation/demodulation circuitry and a fl oating supply that powers the signalinput section. The amplifi er inputs monitor the cell; its isolation barrier prevents battery-stack common-mode voltage from corrupting output-referred measurement results. This approach works well, but the need for one isolation amplifi er per cell is complex and expensive. You can simplify this approach by, for example, using one power driver to service many amplifiers, but the method remains costly and involved. Figure C employs a switched-capacitor technique to measure each cell’s voltage and reject common-mode voltage. The clocked switches alternately connect the capacitor across its associated cell and discharge it into an output common-referred capacitor. Old-timers will recognize this confi guration as a derivative of the venerable reed-switched “fl ying-capacitor” multiplexer. After a number of cycles, the output capacitor assumes the cell voltage. A buffer amplifi er provides the output. This arrangement rejects common-mode voltages but requires many expensive, high-voltage switches; a high-voltage level shift; and nonoverlapping switch drive. More subtly, switch leakage degrades accuracy, particularly as temperature rises. Optically driven switches, particularly those available as conveniently packaged LED-driven MOSFETs, can simplify the level shift, but expense, voltagebreakdown, and leakage concerns remain. Figure D’s approach eliminates switch-related disadvantages. A dedicated ADC digitizes each cell’s potential. The ADC output transmits across an isolation barrier through a data isolator, such as an optical transformer. In its most elementary form, a separate isolated power supply powers each ADC. You can reduce but not eliminate the isolatedsupply population. Constraints include cell voltage and the ADC’s maximum permissible supply and input-common-mode voltages. Within these limitations, one isolated supply can service several ADC channels. You can further refi ne the setup by employing multiplexed- input ADCs. Even with these improvements, large battery stacks mandate the use of numerous isolated supplies. Although this scheme is technologically sound, it is complex and expensive.

 

REFERENCES

Williams, Jim, “Transformers and optocouplers implement isolation techniques,” EDN, Jan 6, 1982, pg 115. Williams, Jim, “Isolated Temperature Sensor,” LT198A Data Sheet, Linear Technology, 1983. Dobkin, RC, “Isolated Temperature Sensor,” LM135 Data Sheet, National Semiconductor, 1978. Williams, Jim, “Isolation Techniques for Signal Conditioning,” National Semiconductor, Application Note 298, May 1982. Sheingold, DH, Transducer Interfacing Handbook, Analog Devices, 1980. Williams, Jim, “Signal Sources, Conditioners and Power Circuitry,” Linear Technology, Application Note 98, November 2004.

 

AUTHORS’ BIOGRAPHIES

Jim Williams is a staff scientist at Linear Technology (www.linear. com), where he specializes in analog-circuit and instrumentation design. He has served in similar capacities at National Semiconductor, Arthur D Little, and the Instrumentation Laboratory at the Massachusetts Institute of Technology (Cambridge, Massachussetts). He studied at Wayne State University (Detroit). Mark Thoren is an applications manager for mixed-signal products at Linear Technology. He has degrees in agricultural mechanical engineering and electrical engineering, both from the University of Maine.