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NXP’s re-use methodology re-sold

Semiconductor IP vendor IPextreme is to add a new category of IP product to its catalogue, making an IP offering out of an IP-design methodology. Following an agreement with NXP, it is to re-sell that company’s CoReUse design environment for IP creation and deployment. IPextreme is to use its own delivery mechanism to sell software designed for the management of semiconductor IP itself. NXP developed CoReUse over more than a decade as a group- and enterprise-level environment for engineers to develop reusable, highquality IP. It is in use today by nearly every NXP design group worldwide as the standard by which the company’s engineers develop and share IP. CoReUse consists of a series of specifications, guidelines, and templates that direct engineers in developing reusable digital, AMS (analogue-mixed-signal) and RF IP. The Foundation product comprises a set of reference manuals that include the CoReUse Standard and Constraints, which define directory structures, naming conventions, and quick-reference cards for Verilog and VHDL designs. DfT (Design for Test) specifications adhere to CTAG/IEEE 1500, and support testing AMS and high-speed IO technologies. There is an additional set of specifications targeted for AMS and RF IP: at the system level, there is support for transaction-level modeling, SoC integration using SPIRIT IP-XACT, and PSL assertions. A further module deals with architectural-level specifications for using on-chip busses, allowing the creation of IP-based platforms. The package is completed with documentation templates for engineers to capture key information about the IP they are developing.

Alongside CoReUse, IPextreme will offer QCore, an EDA tool internally developed by NXP to automatically check an IP’s deliverables and documentation for compliance to the standard. QCore produces a certifi cate that classifi es IP according to its compliance level to the CoReUse standard, allowing integrators to know the level of completeness and quality that this IP achieves. IPextreme’s CEO Warren Savage says that QCore is in some respects an enforcement mechanism: “companies try to implement re-use but often relapse; [part of] this offering is to provide a means of avoiding doing so.” The product is now at version 4.5 and has grown to encompass 20 distinct domains.

IPextreme will offer the NXP software via its recently introduced Core Store, a web-based purchasing tool for semiconductor IP. There, you can look at a catalogue of IP cores—with open pricing— and follow a Web-based purchasing procedure; you complete a standard license agreement, make a payment, and IPextreme delivers the product through its XPack encrypted form. Removing sales personnel from the process signifi cantly reduces the cost of IP that this mechanism delivers, and design support becomes an optional purchase, Savage says. Cores available on this medium include the Freescale Coldfi re V1 microcontroller, a collection of National Semiconductor AMBA-bus-compatible peripherals— and, now, the NXP CoReUse offering.

The methodology in CoReUse is embodied in electronic manuals, to which the subscription begins at $199 per year. On its Web site, IPextreme is hosting a video clip in which Ralph von Vignau, senior director in NXP’s Corporate Innovation and Technology group and president of the SPIRIT Consortium, outlines the philosophy underlying CoReUse.

IPextreme, www.ip-extreme.com.
NXP, www.nxp.com.