Programmable clock multiplier with good jitter performance

EDN Europe, 31 Oct 2008

ON Semiconductor has introduced the NB3N3020, a high precision, low phase noise, programmable clock multiplier with good jitter performance. The device generates an LVPECL clock, as well as LVCMOS clock on the same device which enables the multiplier to be used in networking, consumer electronics and computing applications. The device has three tri-level LVCMOS single ended select pins that set one of 26 possible clock frequencies. The clock multiplier has an output frequency range from 8MHz to 210MHz. It takes a 5.0-27MHz fundamental mode parallel resonant crystal or a 2.0-210MHz LVCMOS single ended clock source and generates a differential LVPECL output and a single ended LVCMOS output at a selectable clock output frequency which is a multiple of the input clock frequency. The LVCMOS output enable (OE) tri-states clock outputs when low, allowing system designers to dynamically control the presence of clock timing in their systems. The device has good jitter performance with period jitter of 5 picoseconds (ps). The device is available in a 5x 4.4mm TSSOP-16 package.



 

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