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Programmable Logic/ Memory

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FPGA IP completes solution for wireless backhaul networks 4/4/2008

Wintegra’s third generation Universal Front End (UFE3) IP core for high channel density wireless backhaul designs, when used with the company’s WinPath2 processor and PMC-Sierra’s TEMUX family of framer and mappers, provides an upgrade path for designers working to migrate voice-centric cellular solutions ...

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  • Programmable-chip IP block boosts mobile images 14/3/2008

    Apical is a UK-based developer of image processing products; it has a technology it calls iridix that it designed to improve the viewability of images and video displayed on mobile device LCD ....

    FPGAs reach for new application spaces 1/3/2008

    In 2007, semiconductor industry analysts, notably Gartner group, were forecasting that the programmable-logic sector would end the year showing a slight decline in revenues. Data published so far in 2008 indicates that this view was probably ....

    Oscars overshadowed by EDN Innovation Awards! 22/2/2008

    Only a few days to go until voting closes in EDN’s Annual Innovation Awards. As in previous years, the Awards will be announced and presented at a function that takes place in San Jose, California, in April – but readers of any edition of EDN Worldwide ....

    USB-bridge controller supports multilevel-cell NAND flash 1/2/2008

    A year ago, Cypress Semiconductor announced the West Bridge family of chips that primarily add high-speed-USB support to products such ....

    Xilinx bundles Ethernet, FPU as no-cost IP 16/1/2008

    Xilinx has enlarged its range of “no-fee” intellectual property (IP) cores for embedded processing systems that you design with its platform FPGAs. The 10/100 Ethernet MAC Lite, single precision floating-point ....

    Xilinx steps up effort to drive FPGAs in automotive systems 11/1/2008

    Xilinx, in conjunction with German automotive system developer Si-Gate, has created a package for designers of automotive systems, based ....

    FPGA/PCB design package adds ESL features 1/1/2008

    Version 6.8 of Altium’s Designer software is presented as a “service pack” but contains many new features that users might normally expect to see in a major revision: for example, it adds a 3D visualisation ....

    FPGA tool flow synthesises designs from Simulink 1/1/2008

    The MathWorks and Mentor Graphics have collaborated on a tool flow that provides an optimised path to take HDL (hardware-description language) that MathWorks Simulink HDL Coder generates into Mentor’s Precision ....

    Zero-power CPLDs 1/1/2008

    Altera has designed its MAX IIZ CPLDs to meet the power, package and price demands of the portableapplications market. They have up to six times the density and three times the I/O count of competing traditional macrocell-based ....

    Embedded-FRAM DTV IC 1/1/2008

    Fujitsu Microelectronics has announced an embedded-FRAM (ferroelectric RAM) for digital TVs that enables simultaneous use of four-channel HDMI (High-Definition ....

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