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Design Center

Programmable Logic/ Memory

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  • FPGA tool flow synthesises designs from Simulink 1/1/2008

    The MathWorks and Mentor Graphics have collaborated on a tool flow that provides an optimised path to take HDL (hardware-description language) that MathWorks Simulink HDL Coder generates into Mentor’s Precision ....

    Zero-power CPLDs 1/1/2008

    Altera has designed its MAX IIZ CPLDs to meet the power, package and price demands of the portableapplications market. They have up to six times the density and three times the I/O count of competing traditional macrocell-based ....

    Embedded-FRAM DTV IC 1/1/2008

    Fujitsu Microelectronics has announced an embedded-FRAM (ferroelectric RAM) for digital TVs that enables simultaneous use of four-channel HDMI (High-Definition ....

    FPGA/PCB design package adds ESL features 11/12/2007

    Version 6.8 of Altium’s Designer software is presented as a ‘service pack’ but contains many new features that users might normally expect to see in a major revision; for example, it adds a 3D visualisation ....

    Altera refreshes CPLD line for portables 11/12/2007

    Altera has designed its MAX IIZ CPLD to meet power, package and price demands of the portable applications market. They have up to six times the density and three times the I/O count of competing traditional ....

    Xilinx updates MicroBlaze for 32-bit FPGA-CPU-core sector 1/12/2007

    Lime Microsystems is a fabless semiconductor start-up based in the UK that has been developing transceiver technology for use with wireless standards such as WiMax. The company has announced a reference design for a MicroTCA-format card ....

    2-Mbit density FRAM 1/12/2007

    Developer of non-volatile FRAM (ferroelectric random access memory) Ramtron has extended its family of high-density FRAM devices with the FM21L16. This memory ....

    FPGA tool flow synthesises designs from Simulink 20/11/2007

    The MathWorks and Mentor Graphics have collaborated on a tool flow that provides and optimised path to take hardware description language (HDL) ....

    Embedded-FRAM chip for digital TV 19/11/2007

    Fujitsu Microelectronics has announced an embedded-FRAM (ferroelectric RAM) for digital TVs that enables simultaneous use of four-channel High-Definition Multimedia ....

    Synopsys adds Altera's Nios II processor to ASIC IP 19/11/2007

    Having recently announced a package that provides a means of putting ARM Cortex M1 cores into its ....

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